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LTC6991
17
6991fb
The oscillator can still function with reduced accuracy for
ISET<1.25μA.Atapproximately500nA,theoscillatoroutput
will be frozen in its current state. The output could halt in
a high or low state. This avoids introducing short pulses
when frequency modulating a very low frequency output.
At the other extreme, it is not recommended to operate
the master oscillator beyond 2MHz because the accuracy
of the DIV pin ADC will suffer.
Frequency Modulation and Settling Time
The LTC6991 will respond to changes in ISET up to a –3dB
bandwidth of 0.4 fOUT.
Following a 2× or 0.5× step change in ISET, the output
frequency takes less than one cycle to settle to within 1%
of the final value.
Power Supply Current
The power supply current varies with frequency, supply
voltage and output loading. It can be estimated under
any condition using the following equation. This equation
APPLICATIONS INFORMATION
–
+
6991 F15
LTC6991
RST
GND
SET
OUT
V+
DIV
C1
0.1μF
R1
R2
RSET
V+
RVCO
V+
0.1μF
1/2
LTC6078
LTC1659
V+
VCC
REF
GND
VOUT
μP
DIN
CLK
CS/LD
1MHz 50kΩ
1024 NDIV RVCO
fOUT =
DIN = 0 TO 4095
1 +
–
RVCO
RSET
DIN
4096
0.1μF
Figure 15. Digitally-Controlled Oscillator
ignores CLOAD (valid for CLOAD < 1nF) and assumes the
output has 50% duty cycle.
IS(TYP) ≈ V+ fMASTER 7.8pF +
V+
420k
Ω
+
V+
2 RLOAD
+ 1.8 ISET +50μA
Supply Bypassing and PCB Layout Guidelines
The LTC6991 is a 2.2% accurate silicon oscillator when
used in the appropriate manner. The part is simple to use
and by following a few rules, the expected performance
is easily achieved. Adequate supply bypassing and proper
PCB layout are important to ensure this.
Figure 18 shows example PCB layouts for both the TSOT-23
and DFN packages using 0603 sized passive components.
The layouts assume a two layer board with a ground plane
layer beneath and around the LTC6991. These layouts are
a guide and need not be followed exactly.
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